Fine-grained Analysis on Fast Implementations of Multi-writer Atomic Registers

Multi-writer distributed atomic registers are at the heart of a large number of distributed algorithms. While enjoying the benefits of atomicity, researchers further explore fast implementations which are optimal in terms of data access latency. Though it is proven that atomic register implementations are impossible when both read and write are required to be fast, it is still open whether implementations are impossible when only either write or read is required to be fast. This work proves the impossibility of fast write implementations based on a series of chain arguments among indistiguishable executions. We also show the necessary and sufficient conditions for fast read implementations by extending the corresponding results of the single-writer case. This work completes a series of studies on fast implementation of distributed atomic registers.