This paper introduces a compact and secure 16-bit substitution box (S-box) designed over the composite field , optimized for both hardware efficiency and cryptographic robustness. The proposed S-box decomposes operations into subfields, leveraging a tower field architecture. This enables significant hardware reduction through optimized field inversion and a low-cost affine transformation. Security evaluations confirm resilience against linear, differential, algebraic and DPA attacks, validated via metrics including Nonlinearity (32512), Differential Uniformity (4), Algebraic Degree (15), Transparency order (15.9875) and SNR (0.34e-08). The hardware results, in 65 nm CMOS technology, show the proposed 16-bit S-box has lower hardware resources consumption and lower critical path delay (CPD) than those of other 16-bit S-boxes. By integrating high algebraic complexity with resource-efficient structures, this work addresses the growing demand for scalable cryptographic primitives in data-sensitive applications, demonstrating that larger S-boxes can enhance security without proportional hardware costs. The results underscore the viability of composite field-based architectures in balancing security and efficiency for modern block ciphers.
View on arXiv@article{rashidi2025_2507.01423,
title={ A Compact 16-bit S-box over Tower Field $\F_{(((2^2)^2)^2)^2}$ with High Security },
author={ Bahram Rashidi and Behrooz Khadem },
journal={arXiv preprint arXiv:2507.01423},
year={ 2025 }
}