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1804.05714
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Developing Synthesis Flows Without Human Knowledge
16 April 2018
Cunxi Yu
Houping Xiao
G. Micheli
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Papers citing
"Developing Synthesis Flows Without Human Knowledge"
33 / 33 papers shown
ELF: Efficient Logic Synthesis by Pruning Redundancy in Refactoring
Design Automation Conference (DAC), 2025
Dimitris Tsaras
Xing Li
Lei Chen
Zhiyao Xie
Mingxuan Yuan
76
0
0
11 Aug 2025
Graph Neural Networks for Automatic Addition of Optimizing Components in Printed Circuit Board Schematics
Pascal Plettenberg
André Alcalde
Bernhard Sick
Josephine M. Thomas
257
0
0
12 Jun 2025
A Benchmark on Directed Graph Representation Learning in Hardware Designs
Haoyu Wang
Yinan Huang
Nan Wu
Pan Li
OOD
336
1
0
09 Oct 2024
ShortCircuit: AlphaZero-Driven Circuit Design
Dimitrios Tsaras
Antoine Grosnit
Lei Chen
Zhiyao Xie
Haitham Bou-Ammar
Mingxuan Yuan
223
0
0
19 Aug 2024
MapTune: Advancing ASIC Technology Mapping via Reinforcement Learning Guided Library Tuning
Mingju Liu
Daniel Robinson
Yingjie Li
Cunxi Yu
127
7
0
25 Jul 2024
Differentiable Combinatorial Scheduling at Scale
Mingju Liu
Yingjie Li
Jiaqi Yin
Zhiru Zhang
Cunxi Yu
161
5
0
06 Jun 2024
Circuit Transformer: A Transformer That Preserves Logical Equivalence
International Conference on Learning Representations (ICLR), 2024
Xihan Li
Xing Li
Lei Chen
Xing Zhang
Mingxuan Yuan
Jun Wang
130
5
0
14 Mar 2024
On Robustness and Generalization of ML-Based Congestion Predictors to Valid and Imperceptible Perturbations
Chester Holtz
Yucheng Wang
Chung-Kuan Cheng
Bill Lin
AAML
OOD
151
0
0
29 Feb 2024
Retrieval-Guided Reinforcement Learning for Boolean Circuit Minimization
International Conference on Learning Representations (ICLR), 2024
A. B. Chowdhury
Marco Romanelli
Benjamin Tan
Ramesh Karri
Siddharth Garg
193
14
0
22 Jan 2024
BoolGebra: Attributed Graph-learning for Boolean Algebraic Manipulation
Yingjie Li
Anthony Agnesina
Yanqing Zhang
Haoxing Ren
Cunxi Yu
118
4
0
19 Jan 2024
Verilog-to-PyG -- A Framework for Graph Learning and Augmentation on RTL Designs
Yingjie Li
Mingju Liu
Alan Mishchenko
Cunxi Yu
134
9
0
09 Nov 2023
Towards the Imagenets of ML4EDA
A. B. Chowdhury
Shailja Thakur
Hammond Pearce
Ramesh Karri
Siddharth Garg
182
2
0
16 Oct 2023
Accelerating Exact Combinatorial Optimization via RL-based Initialization -- A Case Study in Scheduling
Jiaqi Yin
Cunxi Yu
100
4
0
19 Aug 2023
Chip-Chat: Challenges and Opportunities in Conversational Hardware Design
Workshop on Machine Learning for CAD (ML4CAD), 2023
Jason Blocklove
S. Garg
Ramesh Karri
Hammond Pearce
261
261
0
22 May 2023
INVICTUS: Optimizing Boolean Logic Circuit Synthesis via Synergistic Learning and Search
A. B. Chowdhury
Marco Romanelli
Benjamin Tan
Ramesh Karri
S. Garg
209
2
0
22 May 2023
RESPECT: Reinforcement Learning based Edge Scheduling on Pipelined Coral Edge TPUs
Design Automation Conference (DAC), 2023
Jiaqi Yin
Yingjie Li
Daniel Robinson
Cunxi Yu
166
12
0
10 Apr 2023
AISYN: AI-driven Reinforcement Learning-Based Logic Synthesis Framework
Ghasem Pasandi
Sreedhar Pratty
James Forsyth
90
7
0
08 Feb 2023
The prediction of the quality of results in Logic Synthesis using Transformer and Graph Neural Networks
Chenghao Yang
Zhongda Wang
Yinshui Xia
Zhufei Chu
218
1
0
23 Jul 2022
Rethinking Reinforcement Learning based Logic Synthesis
Chao Wang
Chong Chen
Dexun Li
Bin Wang
206
4
0
16 May 2022
A Survey and Perspective on Artificial Intelligence for Security-Aware Electronic Design Automation
D. Koblah
R. Acharya
Daniel Capecci
Olivia P. Dizon-Paradis
Shahin Tajik
F. Ganji
D. Woodard
Domenic Forte
235
22
0
19 Apr 2022
Too Big to Fail? Active Few-Shot Learning Guided Logic Synthesis
A. B. Chowdhury
Benjamin Tan
Ryan Carey
Tushit Jain
Ramesh Karri
S. Garg
143
3
0
05 Apr 2022
The Dark Side: Security Concerns in Machine Learning for EDA
Zhiyao Xie
Jingyu Pan
Chen-Chia Chang
Yiran Chen
136
3
0
20 Mar 2022
LOSTIN: Logic Optimization via Spatio-Temporal Information with Hybrid Graph Models
IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP), 2022
Nan Wu
Jiwon Lee
Yuan Xie
Cong Hao
181
23
0
20 Jan 2022
BOiLS: Bayesian Optimisation for Logic Synthesis
Design, Automation and Test in Europe (DATE), 2021
Antoine Grosnit
C. Malherbe
Rasul Tutunov
Xingchen Wan
Jun Wang
H. Ammar
187
41
0
11 Nov 2021
OpenABC-D: A Large-Scale Dataset For Machine Learning Guided Integrated Circuit Synthesis
A. B. Chowdhury
Benjamin Tan
Ramesh Karri
S. Garg
323
52
0
21 Oct 2021
A Survey of Machine Learning for Computer Architecture and Systems
ACM Computing Surveys (CSUR), 2021
Nan Wu
Yuan Xie
AI4TS
AI4CE
255
186
0
16 Feb 2021
Machine Learning for Electronic Design Automation: A Survey
Guyue Huang
Jingbo Hu
Yifan He
Jialong Liu
Mingyuan Ma
...
Yuzhe Ma
Haoyu Yang
Bei Yu
Huazhong Yang
Yu Wang
238
294
0
10 Jan 2021
DAVE: Deriving Automatically Verilog from English
Workshop on Machine Learning for CAD (ML4CAD), 2020
Hammond Pearce
Benjamin Tan
Ramesh Karri
82
89
0
27 Aug 2020
Deep-PowerX: A Deep Learning-Based Framework for Low-Power Approximate Logic Synthesis
Ghasem Pasandi
Mackenzie Peterson
Moisés Herrera
Shahin Nazarian
Massoud Pedram
61
13
0
03 Jul 2020
DRiLLS: Deep Reinforcement Learning for Logic Synthesis
Asia and South Pacific Design Automation Conference (ASP-DAC), 2019
Abdelrahman I. Hosny
S. Hashemi
M. Shalan
Sherief Reda
176
125
0
11 Nov 2019
Are Adversarial Perturbations a Showstopper for ML-Based CAD? A Case Study on CNN-Based Lithographic Hotspot Detection
Kang Liu
Haoyu Yang
Yuzhe Ma
Benjamin Tan
Bei Yu
Evangeline F. Y. Young
Ramesh Karri
S. Garg
AAML
107
10
0
25 Jun 2019
Painting on Placement: Forecasting Routing Congestion using Conditional Generative Adversarial Nets
Cunxi Yu
Zhiru Zhang
86
50
0
15 Apr 2019
Performance Estimation of Synthesis Flows cross Technologies using LSTMs and Transfer Learning
Cunxi Yu
Wang Zhou
AI4TS
34
0
0
14 Nov 2018
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