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Minimizing Area and Energy of Deep Learning Hardware Design Using
  Collective Low Precision and Structured Compression

Minimizing Area and Energy of Deep Learning Hardware Design Using Collective Low Precision and Structured Compression

19 April 2018
Shihui Yin
Gaurav Srivastava
S. Venkataramanaiah
C. Chakrabarti
Visar Berisha
Jae-sun Seo
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Papers citing "Minimizing Area and Energy of Deep Learning Hardware Design Using Collective Low Precision and Structured Compression"

1 / 1 papers shown
Title
AxOCS: Scaling FPGA-based Approximate Operators using Configuration
  Supersampling
AxOCS: Scaling FPGA-based Approximate Operators using Configuration Supersampling
Siva Satyendra Sahoo
Salim Ullah
Soumyo Bhattacharjee
Akash Kumar
18
2
0
22 Sep 2023
1