Exploiting DRAM Latency Variations for Generating True Random Numbers

6 August 2018

Papers citing "Exploiting DRAM Latency Variations for Generating True Random Numbers"

4 / 4 papers shown

Title
Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis ˙Ismail Emir Yüksel Yahya Can Tu˘grul Ataberk Olgun F. Nisa Bostancı A. Giray Ya˘glıkçı Geraldo F. Oliveira Haocong Luo Juan Gómez Luna Mohammad Sadrosadati Onur Mutlu 58 15 0 28 Feb 2024
TuRaN: True Random Number Generation Using Supply Voltage Underscaling in SRAMs Ismail Emir Yüksel Ataberk Olgun Behzad Salami F. N. Bostanci Yahya Can Tugrul A. G. Yaglikçi Nika Mansouri-Ghiasi O. Mutlu Oguz Ergin 11 2 0 20 Nov 2022
QUAC-TRNG: High-Throughput True Random Number Generation Using Quadruple Row Activation in Commodity DRAM Chips Ataberk Olgun Minesh Patel A. G. Yaglikçi Haocong Luo Jeremie S. Kim Nisa Bostanci Nandita Vijaykumar Oguz Ergin O. Mutlu 25 61 0 19 May 2021
PreLatPUF: Exploiting DRAM Latency Variations for Generating Robust Device Signatures B. M. S. Bahar Talukder B. Ray Domenic Forte Md. Tauhidur Rahman 24 26 0 07 Aug 2018