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Scalable and Efficient Virtual Memory Sharing in Heterogeneous SoCs with
  TLB Prefetching and MMU-Aware DMA Engine

Scalable and Efficient Virtual Memory Sharing in Heterogeneous SoCs with TLB Prefetching and MMU-Aware DMA Engine

29 August 2018
Andreas Kurth
Pirmin Vogel
A. Marongiu
Luca Benini
ArXiv (abs)PDFHTML

Papers citing "Scalable and Efficient Virtual Memory Sharing in Heterogeneous SoCs with TLB Prefetching and MMU-Aware DMA Engine"

2 / 2 papers shown
HEROv2: Full-Stack Open-Source Research Platform for Heterogeneous
  Computing
HEROv2: Full-Stack Open-Source Research Platform for Heterogeneous ComputingIEEE Transactions on Parallel and Distributed Systems (TPDS), 2022
Andreas Kurth
Björn Forsberg
Luca Benini
217
20
0
11 Jan 2022
Stream Semantic Registers: A Lightweight RISC-V ISA Extension Achieving
  Full Compute Utilization in Single-Issue Cores
Stream Semantic Registers: A Lightweight RISC-V ISA Extension Achieving Full Compute Utilization in Single-Issue CoresIEEE transactions on computers (IEEE Trans. Comput.), 2019
Fabian Schuiki
Florian Zaruba
Torsten Hoefler
Luca Benini
224
53
0
19 Nov 2019
1
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