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On-chip learning for domain wall synapse based Fully Connected Neural
  Network

On-chip learning for domain wall synapse based Fully Connected Neural Network

25 November 2018
Apoorv Dankar
A. Verma
Utkarsh Saxena
Divya Kaushik
S. Chatterjee
D. Bhowmik
ArXiv (abs)PDFHTML

Papers citing "On-chip learning for domain wall synapse based Fully Connected Neural Network"

2 / 2 papers shown
Title
Comparing domain wall synapse with other Non Volatile Memory devices for
  on-chip learning in Analog Hardware Neural Network
Comparing domain wall synapse with other Non Volatile Memory devices for on-chip learning in Analog Hardware Neural Network
Divya Kaushik
Utkarsh Singh
U. Sahu
I. Sreedevi
D. Bhowmik
30
24
0
28 Oct 2019
A Survey of Neuromorphic Computing and Neural Networks in Hardware
A Survey of Neuromorphic Computing and Neural Networks in Hardware
Catherine D. Schuman
T. Potok
Robert M. Patton
J. Birdwell
Mark E. Dean
Garrett S. Rose
J. Plank
197
714
0
19 May 2017
1