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1907.08985
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Achieving Super-Linear Speedup across Multi-FPGA for Real-Time DNN Inference
ACM Transactions on Embedded Computing Systems (ACM TECS), 2019
21 July 2019
Weiwen Jiang
E. Sha
Xinyi Zhang
Lei Yang
Qingfeng Zhuge
Yiyu Shi
Jiaxi Hu
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Papers citing
"Achieving Super-Linear Speedup across Multi-FPGA for Real-Time DNN Inference"
24 / 24 papers shown
Embedded Distributed Inference of Deep Neural Networks: A Systematic Review
Federico Nicolás Peccia
Oliver Bringmann
286
1
0
06 May 2024
SGPRS: Seamless GPU Partitioning Real-Time Scheduler for Periodic Deep Learning Workloads
Amir Fakhim Babaei
Thidapat Chantem
81
2
0
13 Apr 2024
TAPA-CS: Enabling Scalable Accelerator Design on Distributed HBM-FPGAs
Neha Prakriya
Yuze Chi
Suhail Basalama
Linghao Song
Jason Cong
277
4
0
16 Nov 2023
Throughput Maximization of DNN Inference: Batching or Multi-Tenancy?
Seyed Morteza Nabavinejad
M. Ebrahimi
Sherief Reda
295
1
0
26 Aug 2023
MARS: Exploiting Multi-Level Parallelism for DNN Workloads on Adaptive Multi-Accelerator Systems
Design Automation Conference (DAC), 2023
Guan Shen
Jieru Zhao
Zeke Wang
Zhehan Lin
Wenchao Ding
Chentao Wu
Quan Chen
Minyi Guo
141
8
0
23 Jul 2023
On-Device Unsupervised Image Segmentation
Design Automation Conference (DAC), 2023
Junhuan Yang
Yi Sheng
Yu-zhao Zhang
Weiwen Jiang
Lei Yang
277
18
0
24 Feb 2023
Auditing Membership Leakages of Multi-Exit Networks
Conference on Computer and Communications Security (CCS), 2022
Zheng Li
Yiyong Liu
Xinlei He
Ning Yu
Michael Backes
Yang Zhang
AAML
222
47
0
23 Aug 2022
H2H: Heterogeneous Model to Heterogeneous System Mapping with Computation and Communication Awareness
Design Automation Conference (DAC), 2022
Xinyi Zhang
Cong Hao
Peipei Zhou
A. Jones
Jiaxi Hu
162
26
0
29 Apr 2022
A Semi-Decoupled Approach to Fast and Optimal Hardware-Software Co-Design of Neural Accelerators
Bingqian Lu
Zheyu Yan
Yiyu Shi
Shaolei Ren
260
2
0
25 Mar 2022
The Larger The Fairer? Small Neural Networks Can Achieve Fairness for Edge Devices
Design Automation Conference (DAC), 2022
Yi Sheng
Junhuan Yang
Yawen Wu
Kevin Mao
Yiyu Shi
Jingtong Hu
Weiwen Jiang
Lei Yang
240
32
0
23 Feb 2022
EF-Train: Enable Efficient On-device CNN Training on FPGA Through Data Reshaping for Online Adaptation or Personalization
Yue Tang
Xinyi Zhang
Peipei Zhou
Jingtong Hu
183
29
0
18 Feb 2022
Accelerating Framework of Transformer by Hardware Design and Model Compression Co-Optimization
Panjie Qi
E. Sha
Qingfeng Zhuge
Hongwu Peng
Shaoyi Huang
Zhenglun Kong
Yuhong Song
Bingbing Li
246
60
0
19 Oct 2021
Exploration of Quantum Neural Architecture by Mixing Quantum Neuron Designs
Zhepeng Wang
Zhiding Liang
Shangli Zhou
Caiwen Ding
Yiyu Shi
Weiwen Jiang
311
35
0
08 Sep 2021
Can Noise on Qubits Be Learned in Quantum Neural Network? A Case Study on QuantumFlow
Zhiding Liang
Zhepeng Wang
Junhuan Yang
Lei Yang
Jinjun Xiong
Y. Shi
Weiwen Jiang
308
40
0
08 Sep 2021
Enabling OpenMP Task Parallelism on Multi-FPGAs
IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), 2021
Ramon Nepomuceno
Renan Sterle
G. Valarini
M. Pereira
H. Yviquel
Guido Araujo
123
2
0
19 Mar 2021
Dancing along Battery: Enabling Transformer with Run-time Reconfigurability on Mobile Devices
Design Automation Conference (DAC), 2021
Yuhong Song
Weiwen Jiang
Bingbing Li
Panjie Qi
Qingfeng Zhuge
E. Sha
Sakyasingha Dasgupta
Yiyu Shi
Caiwen Ding
166
21
0
12 Feb 2021
When Machine Learning Meets Quantum Computers: A Case Study
Asia and South Pacific Design Automation Conference (ASP-DAC), 2020
Weiwen Jiang
Jinjun Xiong
Yiyu Shi
231
29
0
18 Dec 2020
A Panda? No, It's a Sloth: Slowdown Attacks on Adaptive Multi-Exit Neural Network Inference
International Conference on Learning Representations (ICLR), 2020
Sanghyun Hong
Yigitcan Kaya
Ionut-Vlad Modoranu
Tudor Dumitras
AAML
284
85
0
06 Oct 2020
ConfuciuX: Autonomous Hardware Resource Assignment for DNN Accelerators using Reinforcement Learning
Micro (MICRO), 2020
Sheng-Chun Kao
Geonhwa Jeong
T. Krishna
350
114
0
04 Sep 2020
Standing on the Shoulders of Giants: Hardware and Neural Architecture Co-Search with Hot Start
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2020
Weiwen Jiang
Lei Yang
Sakyasingha Dasgupta
Jiaxi Hu
Yiyu Shi
266
68
0
17 Jul 2020
Hardware Acceleration of Sparse and Irregular Tensor Computations of ML Models: A Survey and Insights
Shail Dave
Riyadh Baghdadi
Tony Nowatzki
Sasikanth Avancha
Aviral Shrivastava
Baoxin Li
335
100
0
02 Jul 2020
Co-Exploration of Neural Architectures and Heterogeneous ASIC Accelerator Designs Targeting Multiple Tasks
Design Automation Conference (DAC), 2020
Lei Yang
Zheyu Yan
Meng Li
Hyoukjun Kwon
Liangzhen Lai
T. Krishna
Vikas Chandra
Weiwen Jiang
Yiyu Shi
293
123
0
10 Feb 2020
Device-Circuit-Architecture Co-Exploration for Computing-in-Memory Neural Accelerators
IEEE transactions on computers (IEEE Trans. Comput.), 2019
Weiwen Jiang
Qiuwen Lou
Zheyu Yan
Lei Yang
Jiaxi Hu
X. S. Hu
Yiyu Shi
694
82
0
31 Oct 2019
When Single Event Upset Meets Deep Neural Networks: Observations, Explorations, and Remedies
Asia and South Pacific Design Automation Conference (ASP-DAC), 2019
Zheyu Yan
Yiyu Shi
Wang Liao
M. Hashimoto
Xichuan Zhou
Cheng Zhuo
AAML
240
64
0
10 Sep 2019
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