2L-3W: 2-Level 3-Way Hardware-Software Co-Verification for the Mapping of Deep Learning Architecture (DLA) onto FPGA Boards

14 November 2019

Papers citing "2L-3W: 2-Level 3-Way Hardware-Software Co-Verification for the Mapping of Deep Learning Architecture (DLA) onto FPGA Boards"

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Title
Output Reachable Set Estimation and Verification for Multi-Layer Neural Networks Weiming Xiang Hoang-Dung Tran Taylor T. Johnson 74 292 0 09 Aug 2017