End-to-end fully-binarized network design: from Generic Learned Thermometer to Block PruningInternational Conference on Artificial Intelligence Circuits and Systems (AICAS), 2025 |
Hardware/Software Co-Design of RISC-V Extensions for Accelerating Sparse DNNs on FPGAsInternational Conference on Field-Programmable Technology (ICFPT), 2024 |
Coding for Computation: Efficient Compression of Neural Networks for Reconfigurable HardwareSymposium on Software Performance (SP), 2025 |