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2012.03402
Cited By

Low-Latency Asynchronous Logic Design for Inference at the Edge

Low-Latency Asynchronous Logic Design for Inference at the Edge

Design, Automation and Test in Europe (DATE), 2020

7 December 2020

ArXiv (abs)PDF HTML

Papers citing "Low-Latency Asynchronous Logic Design for Inference at the Edge"

4 / 4 papers shown

An FPGA Architecture for Online Learning using the Tsetlin Machine

An FPGA Architecture for Online Learning using the Tsetlin Machine

Samuel Prescott

Ole-Christoffer Granmo

90

1

0

01 Jun 2023

Self-timed Reinforcement Learning using Tsetlin Machine

Self-timed Reinforcement Learning using Tsetlin Machine

131

11

0

02 Sep 2021

Coalesced Multi-Output Tsetlin Machines with Clause Sharing

Coalesced Multi-Output Tsetlin Machines with Clause Sharing

Sondre Glimsdal

Ole-Christoffer Granmo

216

36

0

17 Aug 2021

Low-Power Audio Keyword Spotting using Tsetlin Machines

Low-Power Audio Keyword Spotting using Tsetlin MachinesJournal of Low Power Electronics and Applications (J. Low Power Electron. Appl.), 2021

Jie Lei

Ole-Christoffer Granmo

146

45

0

27 Jan 2021