NVCell: Standard Cell Layout in Advanced Technology Nodes with Reinforcement Learning

9 July 2021

Papers citing "NVCell: Standard Cell Layout in Advanced Technology Nodes with Reinforcement Learning"

5 / 5 papers shown

Title
DRC-Coder: Automated DRC Checker Code Generation Using LLM Autonomous Agent Chen-Chia Chang Chia-Tung Ho Yaguang Li Yuxiao Chen Haoxing Ren 3DV 77 2 0 28 Nov 2024
MapTune: Advancing ASIC Technology Mapping via Reinforcement Learning Guided Library Tuning Mingju Liu Daniel Robinson Yingjie Li Cunxi Yu 14 0 0 25 Jul 2024
Large Language Model (LLM) for Standard Cell Layout Design Optimization Chia-Tung Ho Haoxing Ren 32 5 0 24 May 2024
An Adversarial Active Sampling-based Data Augmentation Framework for Manufacturable Chip Design Mingjie Liu Haoyu Yang Zong-Yi Li K. Sastry S. Mukhopadhyay Selim Dogru Anima Anandkumar David Z. Pan Brucek Khailany Haoxing Ren 43 3 0 27 Oct 2022
AIRCHITECT: Learning Custom Architecture Design and Mapping Space A. Samajdar J. Joseph Matthew Denton T. Krishna 17 6 0 16 Aug 2021