Design Space Exploration of SABER in 65nm ASIC

16 September 2021

Papers citing "Design Space Exploration of SABER in 65nm ASIC"

5 / 5 papers shown

Title
REPQC: Reverse Engineering and Backdooring Hardware Accelerators for Post-quantum Cryptography S. Pagliarini Aikata Aikata Malik Imran Sujoy Sinha Roy 46 2 0 14 Mar 2024
SCAR: Power Side-Channel Analysis at RTL-Level Amisha Srivastava Sanjay Das Navnil Choudhury Rafail Psiakis Pedro Henrique Silva Debjit Pal Kanad Basu 24 8 0 10 Oct 2023
XCRYPT: Accelerating Lattice Based Cryptography with Memristor Crossbar Arrays Sarabjeet Singh Xiong Fan A. Prasad Lin Jia Anirban Nag R. Balasubramonian M. N. Bojnordi Elaine Shi 6 2 0 31 Jan 2023
A Unified Cryptoprocessor for Lattice-based Signature and Key-exchange Aikata Aikata A. Mert David Jacquemin Amitabh Das Donald Matthews Santosh K. Ghosh S. Roy 15 26 0 13 Oct 2022
Sapphire: A Configurable Crypto-Processor for Post-Quantum Lattice-based Protocols Utsav Banerjee T. Ukyab A. Chandrakasan 42 193 0 16 Oct 2019