Exploring eFPGA-based Redaction for IP Protection

26 October 2021

Papers citing "Exploring eFPGA-based Redaction for IP Protection"

7 / 7 papers shown

Title
ARIANNA: An Automatic Design Flow for Fabric Customization and eFPGA Redaction Luca Collini Jitendra Bhandari Chiara Muscari Tomajoli Abdul Khader Thalakkattu Moosa Benjamin Tan Xifan Tang P. Gaillardon Ramesh Karri C. Pilato 63 0 0 01 Jun 2025
REDACTOR: eFPGA Redaction for DNN Accelerator Security Yazan Baddour A. Hedayatipour Amin Rezaei 67 0 0 30 Jan 2025
FuncTeller: How Well Does eFPGA Hide Functionality? Zhaokun Han Mohammed Shayan Aneesh Dixit M. Shihab Yiorgos Makris Jeyavijayan Rajendran 44 7 0 08 Jun 2023
High-Level Approaches to Hardware Security: A Tutorial Hammond Pearce Ramesh Karri Benjamin Tan 36 7 0 21 Jul 2022
A Survey and Perspective on Artificial Intelligence for Security-Aware Electronic Design Automation D. Koblah R. Acharya Daniel Capecci Olivia P. Dizon-Paradis Shahin Tajik F. Ganji D. Woodard Domenic Forte 57 12 0 19 Apr 2022
HOLL: Program Synthesis for Higher OrderLogic Locking Gourav Takhar Ramesh Karri C. Pilato Subhajit Roy 78 11 0 25 Jan 2022
Not All Fabrics Are Created Equal: Exploring eFPGA Parameters For IP Redaction Jitendra Bhandari Abdul Khader Thalakkattu Moosa Benjamin Tan C. Pilato Ganesh Gore Xifan Tang Scott Temple P. Gaillardon Ramesh Karri 54 22 0 08 Nov 2021