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Design of High-Throughput Mixed-Precision CNN Accelerators on FPGA

Design of High-Throughput Mixed-Precision CNN Accelerators on FPGA

International Conference on Field-Programmable Logic and Applications (FPL), 2022
9 August 2022
Cecilia Latotzke
Tim Ciesielski
T. Gemmeke
    MQ
ArXiv (abs)PDFHTML

Papers citing "Design of High-Throughput Mixed-Precision CNN Accelerators on FPGA"

1 / 1 papers shown
Title
Mixed-TD: Efficient Neural Network Accelerator with Layer-Specific
  Tensor Decomposition
Mixed-TD: Efficient Neural Network Accelerator with Layer-Specific Tensor DecompositionInternational Conference on Field-Programmable Logic and Applications (FPL), 2023
Zhewen Yu
C. Bouganis
172
0
0
08 Jun 2023
1