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DSAC: Low-Cost RowHammer Mitigation Using In-DRAM Stochastic and Approximate Counting Algorithm
v1v2v3 (latest)

DSAC: Low-Cost RowHammer Mitigation Using In-DRAM Stochastic and Approximate Counting Algorithm

7 February 2023
Seungki Hong
Dongho Kim
Jaehyung Lee
Reum Oh
C. Yoo
Sang-Jun Hwang
Jooyoung Lee
ArXiv (abs)PDFHTML

Papers citing "DSAC: Low-Cost RowHammer Mitigation Using In-DRAM Stochastic and Approximate Counting Algorithm"

25 / 25 papers shown
SoK: Systematizing a Decade of Architectural RowHammer Defenses Through the Lens of Streaming Algorithms
SoK: Systematizing a Decade of Architectural RowHammer Defenses Through the Lens of Streaming Algorithms
M. Kim
Seungmin Baek
Jumin Kim
Hwayong Nam
Nam Sung Kim
Jung Ho Ahn
92
0
0
09 Nov 2025
CnC-PRAC: Coalesce, not Cache, Per Row Activation Counts for an Efficient in-DRAM Rowhammer Mitigation
CnC-PRAC: Coalesce, not Cache, Per Row Activation Counts for an Efficient in-DRAM Rowhammer Mitigation
Chris S. Lin
Jeonghyun Woo
Shiyang Chen
Gururaj Saileshwar
101
2
0
13 Jun 2025
When Mitigations Backfire: Timing Channel Attacks and Defense for PRAC-Based RowHammer Mitigations
When Mitigations Backfire: Timing Channel Attacks and Defense for PRAC-Based RowHammer MitigationsInternational Symposium on Computer Architecture (ISCA), 2025
Jeonghyun Woo
Joyce Qu
Gururaj Saileshwar
Shiyang Chen
289
1
0
15 May 2025
Understanding and Mitigating Covert Channel and Side Channel Vulnerabilities Introduced by RowHammer Defenses
Understanding and Mitigating Covert Channel and Side Channel Vulnerabilities Introduced by RowHammer Defenses
F. Nisa Bostancı
Oguzhan Canpolat
Ataberk Olgun
Ismail Emir Yüksel
Mohammad Sadrosadati
Mohammad Sadrosadati
O. Mutlu
Onur Mutlu
AAML
313
0
0
23 Mar 2025
Revisiting DRAM Read Disturbance: Identifying Inconsistencies Between Experimental Characterization and Device-Level Studies
Revisiting DRAM Read Disturbance: Identifying Inconsistencies Between Experimental Characterization and Device-Level StudiesIEEE VLSI Test Symposium (VTS), 2025
Haocong Luo
Ismail Emir Yüksel
Ataberk Olgun
Mohammad Sadrosadati
O. Mutlu
292
4
0
20 Mar 2025
Chronus: Understanding and Securing the Cutting-Edge Industry Solutions to DRAM Read Disturbance
Chronus: Understanding and Securing the Cutting-Edge Industry Solutions to DRAM Read DisturbanceInternational Symposium on High-Performance Computer Architecture (HPCA), 2025
Oguzhan Canpolat
Mohammad Sadrosadati
Geraldo F. Oliveira
Ataberk Olgun
Nisa Bostancı
Ismail Emir Yüksel
Haocong Luo
Oguz Ergin
Onur Mutlu
156
17
0
18 Feb 2025
Understanding RowHammer Under Reduced Refresh Latency: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions
Understanding RowHammer Under Reduced Refresh Latency: Experimental Analysis of Real DRAM Chips and Implications on Future SolutionsInternational Symposium on High-Performance Computer Architecture (HPCA), 2025
Yahya Can Tugrul
Mohammad Sadrosadati
Ismail Emir Yüksel
Ataberk Olgun
Oguzhan Canpolat
Nisa Bostancı
Mohammad Sadrosadati
Oguz Ergin
O. Mutlu
180
7
0
17 Feb 2025
QPRAC: Towards Secure and Practical PRAC-based Rowhammer Mitigation using Priority Queues
QPRAC: Towards Secure and Practical PRAC-based Rowhammer Mitigation using Priority QueuesInternational Symposium on High-Performance Computer Architecture (HPCA), 2025
Jeonghyun Woo
Shaopeng
Shiyang Chen
A. Jaleel
Gururaj Saileshwar
493
12
0
31 Jan 2025
Preventing Rowhammer Exploits via Low-Cost Domain-Aware Memory
  Allocation
Preventing Rowhammer Exploits via Low-Cost Domain-Aware Memory Allocation
Anish Saxena
Walter Wang
Alexandros Daglis
165
3
0
23 Sep 2024
MINT: Securely Mitigating Rowhammer with a Minimalist In-DRAM Tracker
MINT: Securely Mitigating Rowhammer with a Minimalist In-DRAM Tracker
Moinuddin K. Qureshi
Salman Qazi
A. Jaleel
212
22
0
22 Jul 2024
ImPress: Securing DRAM Against Data-Disturbance Errors via Implicit
  Row-Press Mitigation
ImPress: Securing DRAM Against Data-Disturbance Errors via Implicit Row-Press Mitigation
Moinuddin K. Qureshi
A. Saxena
A. Jaleel
144
11
0
22 Jul 2024
MOAT: Securely Mitigating Rowhammer with Per-Row Activation Counters
MOAT: Securely Mitigating Rowhammer with Per-Row Activation Counters
Moinuddin K. Qureshi
Salman Qazi
192
16
0
13 Jul 2024
Understanding the Security Benefits and Overheads of Emerging Industry
  Solutions to DRAM Read Disturbance
Understanding the Security Benefits and Overheads of Emerging Industry Solutions to DRAM Read Disturbance
Oguzhan Canpolat
A. Giray Yağlıkçı
Geraldo F. Oliveira
Ataberk Olgun
Oguz Ergin
Onur Mutlu
250
23
0
27 Jun 2024
DRAMScope: Uncovering DRAM Microarchitecture and Characteristics by
  Issuing Memory Commands
DRAMScope: Uncovering DRAM Microarchitecture and Characteristics by Issuing Memory CommandsInternational Symposium on Computer Architecture (ISCA), 2024
Hwayong Nam
Seung Hyup Baek
Minbok Wi
M. Kim
Jaehyun Park
Chihun Song
Nam Sung Kim
Jung Ho Ahn
144
18
0
03 May 2024
Probabilistic Tracker Management Policies for Low-Cost and Scalable
  Rowhammer Mitigation
Probabilistic Tracker Management Policies for Low-Cost and Scalable Rowhammer Mitigation
A. Jaleel
S. Keckler
Gururaj Saileshwar
169
9
0
24 Apr 2024
CoMeT: Count-Min-Sketch-based Row Tracking to Mitigate RowHammer at Low
  Cost
CoMeT: Count-Min-Sketch-based Row Tracking to Mitigate RowHammer at Low Cost
F. N. Bostanci
Ismail Emir Yüksel
Ataberk Olgun
Konstantinos Kanellopoulos
Yahya Can Tugrul
A. G. Yaglikçi
Mohammad Sadrosadati
Onur Mutlu
204
25
0
29 Feb 2024
Spatial Variation-Aware Read Disturbance Defenses: Experimental Analysis
  of Real DRAM Chips and Implications on Future Solutions
Spatial Variation-Aware Read Disturbance Defenses: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions
A. G. Yaglikçi
Yahya Can Tugrul
Geraldo F. Oliveira
Ismail Emir Yüksel
Ataberk Olgun
Haocong Luo
Onur Mutlu
257
18
0
28 Feb 2024
Read Disturbance in High Bandwidth Memory: A Detailed Experimental Study
  on HBM2 DRAM Chips
Read Disturbance in High Bandwidth Memory: A Detailed Experimental Study on HBM2 DRAM ChipsDependable Systems and Networks (DSN), 2023
Ataberk Olgun
Majd Osseiran
A. G. Yaglikçi
Yahya Can Tugrul
Haocong Luo
Steve Rhyner
Behzad Salami
Juan Gómez Luna
Onur Mutlu
295
17
0
23 Oct 2023
ABACuS: All-Bank Activation Counters for Scalable and Low Overhead
  RowHammer Mitigation
ABACuS: All-Bank Activation Counters for Scalable and Low Overhead RowHammer Mitigation
Ataberk Olgun
Yahya Can Tugrul
Nisa Bostanci
Ismail Emir Yüksel
Haocong Luo
Steve Rhyner
A. G. Yaglikçi
Geraldo F. Oliveira
Onur Mutlu
336
23
0
15 Oct 2023
Randomized Line-to-Row Mapping for Low-Overhead Rowhammer Mitigations
Randomized Line-to-Row Mapping for Low-Overhead Rowhammer Mitigations
A. Saxena
Saurav Mathur
Moinuddin K. Qureshi
159
0
0
28 Aug 2023
Scalable and Configurable Tracking for Any Rowhammer Threshold
Scalable and Configurable Tracking for Any Rowhammer Threshold
A. Saxena
Moinuddin K. Qureshi
189
0
0
28 Aug 2023
RowPress: Amplifying Read Disturbance in Modern DRAM Chips
RowPress: Amplifying Read Disturbance in Modern DRAM ChipsInternational Symposium on Computer Architecture (ISCA), 2023
Haocong Luo
Ataberk Olgun
A. G. Yaglikçi
Yahya Can Tugrul
Steve Rhyner
Meryem Banu Cavlak
Joel Lindegger
Mohammad Sadrosadati
O. Mutlu
462
78
0
29 Jun 2023
Retrospective: Flipping Bits in Memory Without Accessing Them: An
  Experimental Study of DRAM Disturbance Errors
Retrospective: Flipping Bits in Memory Without Accessing Them: An Experimental Study of DRAM Disturbance Errors
O. Mutlu
294
568
0
28 Jun 2023
X-ray: Discovering DRAM Internal Structure and Error Characteristics by
  Issuing Memory Commands
X-ray: Discovering DRAM Internal Structure and Error Characteristics by Issuing Memory CommandsIEEE computer architecture letters (CAL), 2023
Hwayong Nam
Seung Hyup Baek
Minbok Wi
M. Kim
Jaehyun Park
Chihun Song
Nam Sung Kim
Jung Ho Ahn
177
10
0
06 Jun 2023
DRAM Bender: An Extensible and Versatile FPGA-based Infrastructure to
  Easily Test State-of-the-art DRAM Chips
DRAM Bender: An Extensible and Versatile FPGA-based Infrastructure to Easily Test State-of-the-art DRAM ChipsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (IEEE TCAD), 2022
Ataberk Olgun
Hasan Hassan
A. G. Yaglikçi
Yahya Can Tugrul
Lois Orosa
Haocong Luo
Minesh Patel
Oguz Ergin
O. Mutlu
471
50
0
10 Nov 2022
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