FPGA Resource-aware Structured Pruning for Real-Time Neural Networks

FPGA Resource-aware Structured Pruning for Real-Time Neural Networks

9 August 2023

Benjamin Ramhorst

Vladimir Loncar

G. Constantinides

Papers citing "FPGA Resource-aware Structured Pruning for Real-Time Neural Networks"

6 / 6 papers shown

Title
Optimal Gradient Checkpointing for Sparse and Recurrent Architectures using Off-Chip Memory Wadjih Bencheikh Jan Finkbeiner Emre Neftci 69 0 0 16 Dec 2024
Ultra-low latency recurrent neural network inference on FPGAs for physics applications with hls4ml Elham E Khoda D. Rankin R. Teixeira de Lima Philip C. Harris Scott Hauck ... Chaitanya Paikara R. Rao S. Summers C. Vernieri Aaron Wang AI4CE 20 16 0 01 Jul 2022
Real-time semantic segmentation on FPGAs for autonomous vehicles with hls4ml Nicolò Ghielmetti Vladimir Loncar M. Pierini Marcel Roed S. Summers ... Christoffer Petersson H. Linander J. Ngadiuba Kelvin Lin Philip C. Harris SSeg 30 20 0 16 May 2022
Sparsity in Deep Learning: Pruning and growth for efficient inference and training in neural networks Torsten Hoefler Dan Alistarh Tal Ben-Nun Nikoli Dryden Alexandra Peste MQ 139 684 0 31 Jan 2021
What is the State of Neural Network Pruning? Davis W. Blalock Jose Javier Gonzalez Ortiz Jonathan Frankle John Guttag 183 1,027 0 06 Mar 2020
Fast inference of deep neural networks in FPGAs for particle physics Javier Mauricio Duarte Song Han Philip C. Harris S. Jindariani E. Kreinar ... J. Ngadiuba M. Pierini R. Rivera N. Tran Zhenbin Wu AI4CE 75 386 0 16 Apr 2018