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LLM4EDA: Emerging Progress in Large Language Models for Electronic
  Design Automation

LLM4EDA: Emerging Progress in Large Language Models for Electronic Design Automation

28 December 2023
Ruizhe Zhong
Xingbo Du
Shixiong Kai
Zhentao Tang
Siyuan Xu
Hui-Ling Zhen
Jianye Hao
Qiang Xu
M. Yuan
Junchi Yan
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Papers citing "LLM4EDA: Emerging Progress in Large Language Models for Electronic Design Automation"

10 / 10 papers shown
Title
Deep Representation Learning for Electronic Design Automation
Deep Representation Learning for Electronic Design Automation
Pratik Shrestha
Saran Phatharodom
Alec Aversa
David Blankenship
Zhengfeng Wu
Ioannis Savidis
17
0
0
04 May 2025
AnalogGenie: A Generative Engine for Automatic Discovery of Analog Circuit Topologies
Jian Gao
Weidong Cao
Junyi Yang
Xuan Zhang
39
1
0
28 Feb 2025
PreRoutGNN for Timing Prediction with Order Preserving Partition: Global
  Circuit Pre-training, Local Delay Learning and Attentional Cell Modeling
PreRoutGNN for Timing Prediction with Order Preserving Partition: Global Circuit Pre-training, Local Delay Learning and Attentional Cell Modeling
Ruizhe Zhong
Junjie Ye
Zhentao Tang
Shixiong Kai
Mingxuan Yuan
Jianye Hao
Junchi Yan
26
8
0
27 Feb 2024
LLM4DV: Using Large Language Models for Hardware Test Stimuli Generation
LLM4DV: Using Large Language Models for Hardware Test Stimuli Generation
Zixi Zhang
Greg Chadwick
Hugo McNally
Yiren Zhao
Robert D. Mullins
Jianyi Cheng
Robert Mullins
Yiren Zhao
18
18
0
06 Oct 2023
GPT4AIGChip: Towards Next-Generation AI Accelerator Design Automation via Large Language Models
GPT4AIGChip: Towards Next-Generation AI Accelerator Design Automation via Large Language Models
Yonggan Fu
Yongan Zhang
Zhongzhi Yu
Sixu Li
Zhifan Ye
Chaojian Li
Cheng Wan
Ying Lin
35
59
0
19 Sep 2023
Chip-Chat: Challenges and Opportunities in Conversational Hardware
  Design
Chip-Chat: Challenges and Opportunities in Conversational Hardware Design
Jason Blocklove
S. Garg
Ramesh Karri
Hammond Pearce
38
164
0
22 May 2023
A Deep Learning Framework for Verilog Autocompletion Towards Design and
  Verification Automation
A Deep Learning Framework for Verilog Autocompletion Towards Design and Verification Automation
Enrique Dehaerne
Bappaditya Dey
S. Halder
S. de Gendt
26
9
0
26 Apr 2023
ReAct: Synergizing Reasoning and Acting in Language Models
ReAct: Synergizing Reasoning and Acting in Language Models
Shunyu Yao
Jeffrey Zhao
Dian Yu
Nan Du
Izhak Shafran
Karthik Narasimhan
Yuan Cao
LLMAG
ReLM
LRM
223
2,413
0
06 Oct 2022
Training language models to follow instructions with human feedback
Training language models to follow instructions with human feedback
Long Ouyang
Jeff Wu
Xu Jiang
Diogo Almeida
Carroll L. Wainwright
...
Amanda Askell
Peter Welinder
Paul Christiano
Jan Leike
Ryan J. Lowe
OSLM
ALM
301
11,730
0
04 Mar 2022
DRiLLS: Deep Reinforcement Learning for Logic Synthesis
DRiLLS: Deep Reinforcement Learning for Logic Synthesis
Abdelrahman I. Hosny
S. Hashemi
M. Shalan
Sherief Reda
56
109
0
11 Nov 2019
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