ResearchTrend.AI
  • Papers
  • Communities
  • Events
  • Blog
  • Pricing
Papers
Communities
Social Events
Terms and Conditions
Pricing
Parameter LabParameter LabTwitterGitHubLinkedInBlueskyYoutube

© 2025 ResearchTrend.AI, All rights reserved.

  1. Home
  2. Papers
  3. 2402.18736
  4. Cited By
Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental
  Characterization and Analysis

Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis

28 February 2024
˙Ismail Emir
Yüksel Yahya Can
Tu˘grul Ataberk
Olgun F. Nisa
Bostancı A. Giray Ya˘glıkçı
Geraldo F. Oliveira
Haocong Luo
Juan Gómez Luna
Mohammad Sadrosadati
Onur Mutlu
ArXivPDFHTML

Papers citing "Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis"

7 / 7 papers shown
Title
Understanding RowHammer Under Reduced Refresh Latency: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions
Understanding RowHammer Under Reduced Refresh Latency: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions
Yahya Can Tugrul
A. Giray Yağlıkçı
Ismail Emir Yüksel
Ataberk Olgun
Oguzhan Canpolat
Nisa Bostancı
Mohammad Sadrosadati
Oguz Ergin
O. Mutlu
40
2
0
17 Feb 2025
Simultaneous Many-Row Activation in Off-the-Shelf DRAM Chips:
  Experimental Characterization and Analysis
Simultaneous Many-Row Activation in Off-the-Shelf DRAM Chips: Experimental Characterization and Analysis
Ismail Emir Yüksel
Yahya Can Tugrul
F. N. Bostanci
Geraldo F. Oliveira
A. G. Yaglikçi
...
Melina Soysal
Haocong Luo
Juan Gómez Luna
Mohammad Sadrosadati
Onur Mutlu
19
4
0
09 May 2024
Amplifying Main Memory-Based Timing Covert and Side Channels using
  Processing-in-Memory Operations
Amplifying Main Memory-Based Timing Covert and Side Channels using Processing-in-Memory Operations
Konstantinos Kanellopoulos
F. N. Bostanci
Ataberk Olgun
A. G. Yaglikçi
Ismail Emir Yüksel
Nika Mansouri-Ghiasi
Z. Bingöl
Mohammad Sadrosadati
Onur Mutlu
20
2
0
17 Apr 2024
Spatial Variation-Aware Read Disturbance Defenses: Experimental Analysis
  of Real DRAM Chips and Implications on Future Solutions
Spatial Variation-Aware Read Disturbance Defenses: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions
A. G. Yaglikçi
Yahya Can Tugrul
Geraldo F. Oliveira
Ismail Emir Yüksel
Ataberk Olgun
Haocong Luo
Onur Mutlu
22
13
0
28 Feb 2024
Improving DRAM Performance, Reliability, and Security by Rigorously
  Understanding Intrinsic DRAM Operation
Improving DRAM Performance, Reliability, and Security by Rigorously Understanding Intrinsic DRAM Operation
Hasan Hassan
21
1
0
13 Mar 2023
SpyHammer: Understanding and Exploiting RowHammer under Fine-Grained
  Temperature Variations
SpyHammer: Understanding and Exploiting RowHammer under Fine-Grained Temperature Variations
Lois Orosa
Ulrich Rührmair
A. G. Yaglikçi
Haocong Luo
Ataberk Olgun
Patrick Jattke
Minesh Patel
Jeremie S. Kim
Kaveh Razavi
Onur Mutlu
11
3
0
08 Oct 2022
HiRA: Hidden Row Activation for Reducing Refresh Latency of
  Off-the-Shelf DRAM Chips
HiRA: Hidden Row Activation for Reducing Refresh Latency of Off-the-Shelf DRAM Chips
A. G. Yaglikçi
Ataberk Olgun
Minesh Patel
Haocong Luo
Hasan Hassan
Lois Orosa
Oguz Ergin
O. Mutlu
25
42
0
21 Sep 2022
1