ResearchTrend.AI
  • Papers
  • Communities
  • Events
  • Blog
  • Pricing
Papers
Communities
Social Events
Terms and Conditions
Pricing
Parameter LabParameter LabTwitterGitHubLinkedInBlueskyYoutube

© 2025 ResearchTrend.AI, All rights reserved.

  1. Home
  2. Papers
  3. 2404.19354
  4. Cited By
PEFSL: A deployment Pipeline for Embedded Few-Shot Learning on a FPGA
  SoC

PEFSL: A deployment Pipeline for Embedded Few-Shot Learning on a FPGA SoC

30 April 2024
Lucas Grativol Ribeiro
Lubin Gauthier
Mathieu Léonardon
Jérémy Morlier
Antoine Lavrard-Meyer
Guillaume Muller
Virginie Fresse
Matthieu Arzel
ArXivPDFHTML

Papers citing "PEFSL: A deployment Pipeline for Embedded Few-Shot Learning on a FPGA SoC"

1 / 1 papers shown
Title
Open-source FPGA-ML codesign for the MLPerf Tiny Benchmark
Open-source FPGA-ML codesign for the MLPerf Tiny Benchmark
H. Borras
G. D. Guglielmo
Javier Mauricio Duarte
Nicolò Ghielmetti
B. Hawks
...
Nhan Tran
Yaman Umuroglu
Olivia Weng
Aidan Yokuda
Michaela Blott
VLM
MQ
17
14
0
23 Jun 2022
1