Simultaneous Many-Row Activation in Off-the-Shelf DRAM Chips: Experimental Characterization and Analysis

9 May 2024

Papers citing "Simultaneous Many-Row Activation in Off-the-Shelf DRAM Chips: Experimental Characterization and Analysis"

2 / 2 papers shown

Title
HiRA: Hidden Row Activation for Reducing Refresh Latency of Off-the-Shelf DRAM Chips A. G. Yaglikçi Ataberk Olgun Minesh Patel Haocong Luo Hasan Hassan Lois Orosa Oguz Ergin O. Mutlu 27 42 0 21 Sep 2022
SynCron: Efficient Synchronization Support for Near-Data-Processing Architectures Christina Giannoula Nandita Vijaykumar Nikela Papadopoulou Vasileios Karakostas Ivan Fernandez Juan Gómez Luna Lois Orosa N. Koziris G. Goumas O. Mutlu 80 82 0 19 Jan 2021