Title |
|---|
 LLM-VeriPPA: Power, Performance, and Area Optimization aware Verilog Code Generation with Large Language ModelsWorkshop on Machine Learning for CAD (ML4CAD), 2025 |
 ReChisel: Effective Automatic Chisel Code Generation by LLM with ReflectionDesign Automation Conference (DAC), 2025 |
 VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing ToolAAAI Conference on Artificial Intelligence (AAAI), 2024 |
 LLM4DV: Using Large Language Models for Hardware Test Stimuli GenerationIEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), 2023 |
