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RTL++: Graph-enhanced LLM for RTL Code Generation

RTL++: Graph-enhanced LLM for RTL Code Generation

11 May 2025
Mohammad Akyash
Kimia Azar
Hadi Kamali
ArXiv (abs)PDFHTML

Papers citing "RTL++: Graph-enhanced LLM for RTL Code Generation"

7 / 7 papers shown
Large Language Model for Verilog Code Generation: Literature Review and the Road Ahead
Large Language Model for Verilog Code Generation: Literature Review and the Road Ahead
Guang Yang
Wei-Shi Zheng
Xiang Chen
Dong Liang
Peng Hu
...
Haotian Cheng
Yiheng Shen
Xing Hu
Terry Yue Zhuo
David Lo
104
0
0
29 Oct 2025
REvolution: An Evolutionary Framework for RTL Generation driven by Large Language Models
REvolution: An Evolutionary Framework for RTL Generation driven by Large Language Models
Kyungjun Min
Kyumin Cho
Junhwan Jang
Seokhyeong Kang
128
1
0
24 Oct 2025
CircuitGuard: Mitigating LLM Memorization in RTL Code Generation Against IP Leakage
CircuitGuard: Mitigating LLM Memorization in RTL Code Generation Against IP Leakage
Nowfel Mashnoor
Mohammad Akyash
Hadi M Kamali
Kimia Azar
122
0
0
22 Oct 2025
AnalogCoder-Pro: Unifying Analog Circuit Generation and Optimization via Multi-modal LLMs
AnalogCoder-Pro: Unifying Analog Circuit Generation and Optimization via Multi-modal LLMs
Yao Lai
Souradip Poddar
Sungyoung Lee
Guojin Chen
Mengkang Hu
Bei Yu
Ping Luo
David Z. Pan
216
2
0
04 Aug 2025
TimelyHLS: LLM-Based Timing-Aware and Architecture-Specific FPGA HLS Optimization
TimelyHLS: LLM-Based Timing-Aware and Architecture-Specific FPGA HLS Optimization
Nowfel Mashnoor
Mohammad Akyash
Hadi Kamali
Kimia Azar
162
1
0
23 Jul 2025
LLM-IFT: LLM-Powered Information Flow Tracking for Secure Hardware
LLM-IFT: LLM-Powered Information Flow Tracking for Secure HardwareIEEE VLSI Test Symposium (VTS), 2025
Nowfel Mashnoor
Mohammad Akyash
Hadi M Kamali
Kimia Azar
183
9
0
09 Apr 2025
CraftRTL: High-quality Synthetic Data Generation for Verilog Code Models with Correct-by-Construction Non-Textual Representations and Targeted Code Repair
CraftRTL: High-quality Synthetic Data Generation for Verilog Code Models with Correct-by-Construction Non-Textual Representations and Targeted Code RepairInternational Conference on Learning Representations (ICLR), 2024
Mingjie Liu
Yun-Da Tsai
Wenfei Zhou
Haoxing Ren
SyDa3DV
371
40
0
19 Sep 2024
1