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QiMeng-CodeV-R1: Reasoning-Enhanced Verilog Generation
30 May 2025
Y. Zhu
Di Huang
Hanqi Lyu
X. Zhang
Chongxiao Li
Wenxuan Shi
Yutong Wu
Jianan Mu
Jinghua Wang
Yang Zhao
Pengwei Jin
Shuyao Cheng
Shengwen Liang
Xishan Zhang
Rui Zhang
Zidong Du
Qi Guo
Xing Hu
Yihao Chen
OffRL
LRM
Re-assign community
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HuggingFace (8 upvotes)
Github (12263★)
Papers citing
"QiMeng-CodeV-R1: Reasoning-Enhanced Verilog Generation"
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AnalogCoder-Pro: Unifying Analog Circuit Generation and Optimization via Multi-modal LLMs
Yao Lai
Souradip Poddar
Sungyoung Lee
Guojin Chen
Mengkang Hu
Bei Yu
Ping Luo
David Z. Pan
218
2
0
04 Aug 2025
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