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Origami: A 803 GOp/s/W Convolutional Network Accelerator
v1v2 (latest)

Origami: A 803 GOp/s/W Convolutional Network Accelerator

14 December 2015
Lukas Cavigelli
Luca Benini
ArXiv (abs)PDFHTML

Papers citing "Origami: A 803 GOp/s/W Convolutional Network Accelerator"

30 / 30 papers shown
Taxonomy and Benchmarking of Precision-Scalable MAC Arrays Under
  Enhanced DNN Dataflow Representation
Taxonomy and Benchmarking of Precision-Scalable MAC Arrays Under Enhanced DNN Dataflow RepresentationIEEE Transactions on Circuits and Systems Part 1: Regular Papers (TCAS-I), 2021
Ehab M. Ibrahim
L. Mei
Marian Verhelst
MQ
118
14
0
10 Aug 2021
Tackling Variabilities in Autonomous Driving
Tackling Variabilities in Autonomous Driving
Yuqiong Qi
Yang Hu
Haibin Wu
Shen Li
Haiyu Mao
Xiaochun Ye
Xiaochun Ye
Ninghui Sun
84
1
0
21 Apr 2021
Faster Convolution Inference Through Using Pre-Calculated Lookup Tables
Faster Convolution Inference Through Using Pre-Calculated Lookup Tables
Grigor Gatchev
V. Mollov
VLM
130
0
0
04 Apr 2021
Hardware and Software Optimizations for Accelerating Deep Neural
  Networks: Survey of Current Trends, Challenges, and the Road Ahead
Hardware and Software Optimizations for Accelerating Deep Neural Networks: Survey of Current Trends, Challenges, and the Road AheadIEEE Access (IEEE Access), 2020
Maurizio Capra
Beatrice Bussolino
Alberto Marchisio
Guido Masera
Maurizio Martina
Mohamed Bennai
BDL
300
175
0
21 Dec 2020
Hardware Implementation of Deep Network Accelerators Towards Healthcare
  and Biomedical Applications
Hardware Implementation of Deep Network Accelerators Towards Healthcare and Biomedical ApplicationsIEEE Transactions on Biomedical Circuits and Systems (TBioCAS), 2020
M. R. Azghadi
Corey Lammie
Nhan Duy Truong
Melika Payvand
Elisa Donati
B. Linares-Barranco
Giacomo Indiveri
212
169
0
11 Jul 2020
Dataflow Aware Mapping of Convolutional Neural Networks Onto Many-Core
  Platforms With Network-on-Chip Interconnect
Dataflow Aware Mapping of Convolutional Neural Networks Onto Many-Core Platforms With Network-on-Chip Interconnect
Andreas Bytyn
René Ahlsdorf
Rainer Leupers
G. Ascheid
51
2
0
18 Jun 2020
AnalogNet: Convolutional Neural Network Inference on Analog Focal Plane
  Sensor Processors
AnalogNet: Convolutional Neural Network Inference on Analog Focal Plane Sensor Processors
Matthew Z. Wong
Benoît Guillard
Riku Murai
Sajad Saeedi
Paul H. J. Kelly
132
18
0
02 Jun 2020
Lupulus: A Flexible Hardware Accelerator for Neural Networks
Lupulus: A Flexible Hardware Accelerator for Neural NetworksIEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2020
Andreas Toftegaard Kristensen
R. Giterman
Alexios Balatsoukas-Stimming
A. Burg
88
0
0
03 May 2020
RPR: Random Partition Relaxation for Training; Binary and Ternary Weight
  Neural Networks
RPR: Random Partition Relaxation for Training; Binary and Ternary Weight Neural Networks
Lukas Cavigelli
Luca Benini
MQ
233
9
0
04 Jan 2020
TinyCNN: A Tiny Modular CNN Accelerator for Embedded FPGA
TinyCNN: A Tiny Modular CNN Accelerator for Embedded FPGA
A. Jahanshahi
73
10
0
15 Nov 2019
FANN-on-MCU: An Open-Source Toolkit for Energy-Efficient Neural Network
  Inference at the Edge of the Internet of Things
FANN-on-MCU: An Open-Source Toolkit for Energy-Efficient Neural Network Inference at the Edge of the Internet of ThingsIEEE Internet of Things Journal (IEEE IoT Journal), 2019
Xiaying Wang
Michele Magno
Lukas Cavigelli
Luca Benini
305
130
0
08 Nov 2019
EDEN: Enabling Energy-Efficient, High-Performance Deep Neural Network
  Inference Using Approximate DRAM
EDEN: Enabling Energy-Efficient, High-Performance Deep Neural Network Inference Using Approximate DRAMMicro (MICRO), 2019
Skanda Koppula
Lois Orosa
A. G. Yaglikçi
Roknoddin Azizi
Taha Shahroodi
Konstantinos Kanellopoulos
O. Mutlu
177
113
0
12 Oct 2019
EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference
  and Training Accelerators
EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training AcceleratorsIEEE Journal on Emerging and Selected Topics in Circuits and Systems (JESTCAS), 2019
Lukas Cavigelli
Georg Rutishauser
Luca Benini
MQ
211
41
0
30 Aug 2019
PULP-NN: Accelerating Quantized Neural Networks on Parallel
  Ultra-Low-Power RISC-V Processors
PULP-NN: Accelerating Quantized Neural Networks on Parallel Ultra-Low-Power RISC-V Processors
Angelo Garofalo
Manuele Rusci
Francesco Conti
D. Rossi
Luca Benini
MQ
201
144
0
29 Aug 2019
Distributed Deep Convolutional Neural Networks for the
  Internet-of-Things
Distributed Deep Convolutional Neural Networks for the Internet-of-ThingsIEEE transactions on computers (IEEE Trans. Comput.), 2019
Simone Disabato
M. Roveri
Cesare Alippi
182
59
0
02 Aug 2019
Tuning Algorithms and Generators for Efficient Edge Inference
Tuning Algorithms and Generators for Efficient Edge Inference
R. Naous
Lazar Supic
Yoonhwan Kang
Ranko Seradejovic
Anish Singhani
Vladimir M. Stojanović
100
2
0
31 Jul 2019
Mapping high-performance RNNs to in-memory neuromorphic chips
Mapping high-performance RNNs to in-memory neuromorphic chips
M. Nair
Giacomo Indiveri
160
4
0
25 May 2019
An Application-Specific VLIW Processor with Vector Instruction Set for
  CNN Acceleration
An Application-Specific VLIW Processor with Vector Instruction Set for CNN Acceleration
Andreas Bytyn
Rainer Leupers
G. Ascheid
50
7
0
10 Apr 2019
Extended Bit-Plane Compression for Convolutional Neural Network
  Accelerators
Extended Bit-Plane Compression for Convolutional Neural Network Accelerators
Lukas Cavigelli
Luca Benini
163
20
0
01 Oct 2018
CBinfer: Exploiting Frame-to-Frame Locality for Faster Convolutional
  Network Inference on Video Streams
CBinfer: Exploiting Frame-to-Frame Locality for Faster Convolutional Network Inference on Video Streams
Lukas Cavigelli
Luca Benini
162
27
0
15 Aug 2018
SqueezeNext: Hardware-Aware Neural Network Design
SqueezeNext: Hardware-Aware Neural Network Design
A. Gholami
K. Kwon
Bichen Wu
Zizheng Tai
Xiangyu Yue
Peter H. Jin
Sicheng Zhao
Kurt Keutzer
177
316
0
23 Mar 2018
Hyperdrive: A Multi-Chip Systolically Scalable Binary-Weight CNN
  Inference Engine
Hyperdrive: A Multi-Chip Systolically Scalable Binary-Weight CNN Inference Engine
Renzo Andri
Lukas Cavigelli
D. Rossi
Luca Benini
MQ
196
19
0
05 Mar 2018
NEURAghe: Exploiting CPU-FPGA Synergies for Efficient and Flexible CNN
  Inference Acceleration on Zynq SoCs
NEURAghe: Exploiting CPU-FPGA Synergies for Efficient and Flexible CNN Inference Acceleration on Zynq SoCs
Paolo Meloni
Alessandro Capotondi
Gianfranco Deriu
Michele Brian
Francesco Conti
D. Rossi
L. Raffo
Luca Benini
130
54
0
04 Dec 2017
Design Automation for Binarized Neural Networks: A Quantum Leap
  Opportunity?
Design Automation for Binarized Neural Networks: A Quantum Leap Opportunity?
Manuele Rusci
Lukas Cavigelli
Luca Benini
MQ
178
21
0
21 Nov 2017
Bridging the Gap Between Neural Networks and Neuromorphic Hardware with
  A Neural Network Compiler
Bridging the Gap Between Neural Networks and Neuromorphic Hardware with A Neural Network Compiler
Yu Ji
Youhui Zhang
Wenguang Chen
Yuan Xie
253
57
0
15 Nov 2017
Chipmunk: A Systolically Scalable 0.9 mm${}^2$, 3.08 Gop/s/mW @ 1.2 mW
  Accelerator for Near-Sensor Recurrent Neural Network Inference
Chipmunk: A Systolically Scalable 0.9 mm2{}^22, 3.08 Gop/s/mW @ 1.2 mW Accelerator for Near-Sensor Recurrent Neural Network Inference
Francesco Conti
Lukas Cavigelli
G. Paulin
Igor Susmelj
Luca Benini
172
44
0
15 Nov 2017
CBinfer: Change-Based Inference for Convolutional Neural Networks on
  Video Data
CBinfer: Change-Based Inference for Convolutional Neural Networks on Video Data
Lukas Cavigelli
Philippe Degen
Luca Benini
BDL
186
52
0
14 Apr 2017
Exploring the Design Space of Deep Convolutional Neural Networks at
  Large Scale
Exploring the Design Space of Deep Convolutional Neural Networks at Large Scale
F. Iandola
3DV
132
19
0
20 Dec 2016
An IoT Endpoint System-on-Chip for Secure and Energy-Efficient
  Near-Sensor Analytics
An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor AnalyticsIEEE Transactions on Circuits and Systems Part 1: Regular Papers (TCAS-I), 2016
Francesco Conti
R. Schilling
Pasquale Davide Schiavone
A. Pullini
D. Rossi
...
Michael Gautschi
Igor Loi
Germain Haugou
Stefan Mangard
Luca Benini
188
120
0
18 Dec 2016
YodaNN: An Architecture for Ultra-Low Power Binary-Weight CNN
  Acceleration
YodaNN: An Architecture for Ultra-Low Power Binary-Weight CNN Acceleration
Renzo Andri
Lukas Cavigelli
D. Rossi
Luca Benini
295
201
0
17 Jun 2016
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