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Caffeinated FPGAs: FPGA Framework For Convolutional Neural Networks

Caffeinated FPGAs: FPGA Framework For Convolutional Neural Networks

30 September 2016
R. Dicecco
Griffin Lacey
Jasmina Vasiljevic
P. Chow
Graham W. Taylor
S. Areibi
ArXiv (abs)PDFHTML

Papers citing "Caffeinated FPGAs: FPGA Framework For Convolutional Neural Networks"

19 / 19 papers shown
Title
Open-source FPGA-ML codesign for the MLPerf Tiny Benchmark
Open-source FPGA-ML codesign for the MLPerf Tiny Benchmark
H. Borras
G. D. Guglielmo
Javier Mauricio Duarte
Nicolò Ghielmetti
B. Hawks
...
Nhan Tran
Yaman Umuroglu
Olivia Weng
Aidan Yokuda
Michaela Blott
VLMMQ
173
15
0
23 Jun 2022
Real-time Hyper-Dimensional Reconfiguration at the Edge using Hardware
  Accelerators
Real-time Hyper-Dimensional Reconfiguration at the Edge using Hardware Accelerators
Indhumathi Kandaswamy
Saurabh Farkya
Z. Daniels
G. V. D. Wal
Aswin Raghavan
...
Jun Hu
M. Lomnitz
M. Isnardi
David C. Zhang
M. Piacentino
BDL
130
6
0
10 Jun 2022
Scale-out Systolic Arrays
Scale-out Systolic ArraysACM Transactions on Architecture and Code Optimization (TACO) (TACO), 2022
A. C. Yüzügüler
Canberk Sönmez
M. Drumond
Yunho Oh
Babak Falsafi
P. Frossard
160
24
0
22 Mar 2022
A Compilation Flow for the Generation of CNN Inference Accelerators on
  FPGAs
A Compilation Flow for the Generation of CNN Inference Accelerators on FPGAs
Seung–Hun Chung
T. Abdelrahman
66
1
0
08 Mar 2022
Fast Convolution based on Winograd Minimum Filtering: Introduction and
  Development
Fast Convolution based on Winograd Minimum Filtering: Introduction and Development
Gan Tong
Libo Huang
92
3
0
01 Nov 2021
Reconfigurable co-processor architecture with limited numerical
  precision to accelerate deep convolutional neural networks
Reconfigurable co-processor architecture with limited numerical precision to accelerate deep convolutional neural networks
Sasindu Wijeratne
Sandaruwan Jayaweera
Mahesh Dananjaya
A. Pasqual
111
7
0
21 Aug 2021
hls4ml: An Open-Source Codesign Workflow to Empower Scientific Low-Power
  Machine Learning Devices
hls4ml: An Open-Source Codesign Workflow to Empower Scientific Low-Power Machine Learning Devices
F. Fahim
B. Hawks
C. Herwig
J. Hirschauer
S. Jindariani
...
J. Ngadiuba
Miaoyuan Liu
Duc Hoang
E. Kreinar
Zhenbin Wu
178
158
0
09 Mar 2021
Fast convolutional neural networks on FPGAs with hls4ml
Fast convolutional neural networks on FPGAs with hls4ml
T. Aarrestad
Vladimir Loncar
Nicolò Ghielmetti
M. Pierini
S. Summers
...
N. Tran
Miaoyuan Liu
E. Kreinar
Zhenbin Wu
Duc Hoang
150
140
0
13 Jan 2021
Caffe Barista: Brewing Caffe with FPGAs in the Training Loop
Caffe Barista: Brewing Caffe with FPGAs in the Training Loop
D. A. Vink
A. Rajagopal
Stylianos I. Venieris
C. Bouganis
BDL
128
7
0
18 Jun 2020
HybridDNN: A Framework for High-Performance Hybrid DNN Accelerator
  Design and Implementation
HybridDNN: A Framework for High-Performance Hybrid DNN Accelerator Design and ImplementationDesign Automation Conference (DAC), 2020
Hanchen Ye
Xiaofan Zhang
Zhize Huang
Gengsheng Chen
Deming Chen
140
69
0
08 Apr 2020
FeCaffe: FPGA-enabled Caffe with OpenCL for Deep Learning Training and
  Inference on Intel Stratix 10
FeCaffe: FPGA-enabled Caffe with OpenCL for Deep Learning Training and Inference on Intel Stratix 10Symposium on Field Programmable Gate Arrays (FPGA), 2019
Ke He
Bo Liu
Yu Zhang
A. Ling
Dian Gu
89
9
0
18 Nov 2019
Training for Únstable' CNN Accelerator:A Case Study on FPGA
Training for Únstable' CNN Accelerator:A Case Study on FPGA
K. Xing
57
4
0
02 Dec 2018
Sparse Winograd Convolutional neural networks on small-scale systolic
  arrays
Sparse Winograd Convolutional neural networks on small-scale systolic arrays
Feng Shi
Haochen Li
Yuhe Gao
Benjamin Kuschner
Song-Chun Zhu
95
15
0
03 Oct 2018
FPGA-Based CNN Inference Accelerator Synthesized from Multi-Threaded C
  Software
FPGA-Based CNN Inference Accelerator Synthesized from Multi-Threaded C Software
Jin Hee Kim
Brett Grady
Ruolong Lian
J. Brothers
J. Anderson
111
41
0
27 Jul 2018
LeFlow: Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep
  Neural Networks
LeFlow: Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks
D. H. Noronha
B. Salehpour
Steve Wilton
97
52
0
14 Jul 2018
Accelerating CNN inference on FPGAs: A Survey
Accelerating CNN inference on FPGAs: A Survey
K. Abdelouahab
Maxime Pelcat
Jocelyn Serot
F. Berry
AI4CE
99
152
0
26 May 2018
Face Recognition with Hybrid Efficient Convolution Algorithms on FPGAs
Face Recognition with Hybrid Efficient Convolution Algorithms on FPGAs
Chuanhao Zhuge
Xinheng Liu
Xiaofan Zhang
S. Gummadi
Jinjun Xiong
Deming Chen
CVBM
88
37
0
23 Mar 2018
Toolflows for Mapping Convolutional Neural Networks on FPGAs: A Survey
  and Future Directions
Toolflows for Mapping Convolutional Neural Networks on FPGAs: A Survey and Future DirectionsACM Computing Surveys (CSUR), 2018
Stylianos I. Venieris
Alexandros Kouris
C. Bouganis
157
194
0
15 Mar 2018
Streaming Architecture for Large-Scale Quantized Neural Networks on an
  FPGA-Based Dataflow Platform
Streaming Architecture for Large-Scale Quantized Neural Networks on an FPGA-Based Dataflow Platform
Chaim Baskin
Natan Liss
Evgenii Zheltonozhskii
A. Bronstein
A. Mendelson
GNNMQ
362
37
0
31 Jul 2017
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