Title
BOLD: Boolean Logic Deep Learning Van Minh Nguyen Cristian Ocampo Aymen Askri Louis Leconte Ba-Hien Tran AI4CE 37 0 0 25 May 2024
Workload-Aware Hardware Accelerator Mining for Distributed Deep Learning Training Muhammad Adnan Amar Phanishayee Janardhan Kulkarni Prashant J. Nair Divyat Mahajan 29 0 0 23 Apr 2024
DEAP: Design Space Exploration for DNN Accelerator Parallelism Ekansh Agrawal Xiangyu Sam Xu 24 1 0 24 Dec 2023
Performance Analysis of DNN Inference/Training with Convolution and non-Convolution Operations H. Esmaeilzadeh Soroush Ghodrati A. Kahng Sean Kinzer Susmita Dey Manasi S. Sapatnekar Zhiang Wang 22 2 0 29 Jun 2023
SPADE: Sparse Pillar-based 3D Object Detection Accelerator for Autonomous Driving Minjae Lee Seongmin Park Hyung-Se Kim Minyong Yoon Jangwhan Lee Junwon Choi Nam Sung Kim Mingu Kang Jungwook Choi 3DPC 26 4 0 12 May 2023
SALSA: Simulated Annealing based Loop-Ordering Scheduler for DNN Accelerators Victor J. B. Jung Arne Symons L. Mei Marian Verhelst Luca Benini 16 3 0 20 Apr 2023
DeFiNES: Enabling Fast Exploration of the Depth-first Scheduling Space for DNN Accelerators through Analytical Modeling L. Mei Koen Goetschalckx Arne Symons Marian Verhelst 39 28 0 10 Dec 2022
Vision Transformer Computation and Resilience for Dynamic Inference Kavya Sreedhar Jason Clemons Rangharajan Venkatesan S. Keckler M. Horowitz 24 2 0 06 Dec 2022
Demystifying Map Space Exploration for NPUs Sheng-Chun Kao A. Parashar Po-An Tsai T. Krishna 35 11 0 07 Oct 2022
Design of High-Throughput Mixed-Precision CNN Accelerators on FPGA Cecilia Latotzke Tim Ciesielski T. Gemmeke MQ 13 7 0 09 Aug 2022
Communication Bounds for Convolutional Neural Networks An Chen J. Demmel Grace Dinh Mason Haberle Olga Holtz 9 4 0 18 Apr 2022
Shisha: Online scheduling of CNN pipelines on heterogeneous architectures Pirah Noor Soomro M. Abduljabbar J. Castrillón Miquel Pericàs 21 1 0 23 Feb 2022
Compiler-Driven Simulation of Reconfigurable Hardware Accelerators Zhijing Li Yuwei Ye S. Neuendorffer Adrian Sampson 28 3 0 01 Feb 2022
Union: A Unified HW-SW Co-Design Ecosystem in MLIR for Evaluating Tensor Operations on Spatial Accelerators Geonhwa Jeong Gokcen Kestor Prasanth Chatarasi A. Parashar Po-An Tsai S. Rajamanickam R. Gioiosa T. Krishna 29 13 0 15 Sep 2021
FLAT: An Optimized Dataflow for Mitigating Attention Bottlenecks Sheng-Chun Kao Suvinay Subramanian Gaurav Agrawal Amir Yazdanbakhsh T. Krishna 32 57 0 13 Jul 2021
ShortcutFusion: From Tensorflow to FPGA-based accelerator with reuse-aware memory allocation for shortcut data Duy-Thanh Nguyen Hyeonseung Je Tuan Nghia Nguyen Soojung Ryu Kyujoong Lee Hyuk-Jae Lee 11 23 0 15 Jun 2021
CoSA: Scheduling by Constrained Optimization for Spatial Accelerators Qijing Huang Minwoo Kang Grace Dinh Thomas Norell Aravind Kalaiah J. Demmel J. Wawrzynek Y. Shao 15 105 0 05 May 2021
Hardware Acceleration of Sparse and Irregular Tensor Computations of ML Models: A Survey and Insights Shail Dave Riyadh Baghdadi Tony Nowatzki Sasikanth Avancha Aviral Shrivastava Baoxin Li 46 81 0 02 Jul 2020
DNN-Chip Predictor: An Analytical Performance Predictor for DNN Accelerators with Various Dataflows and Hardware Architectures Yang Katie Zhao Chaojian Li Yue Wang Pengfei Xu Yongan Zhang Yingyan Lin 11 41 0 26 Feb 2020