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1910.05110
Cited By
Neural networks on microcontrollers: saving memory at inference via operator reordering
2 October 2019
Edgar Liberis
Nicholas D. Lane
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Papers citing
"Neural networks on microcontrollers: saving memory at inference via operator reordering"
9 / 9 papers shown
Title
DTMM: Deploying TinyML Models on Extremely Weak IoT Devices with Pruning
Lixiang Han
Zhen Xiao
Zhenjiang Li
41
5
0
17 Jan 2024
Pex: Memory-efficient Microcontroller Deep Learning through Partial Execution
Edgar Liberis
Nicholas D. Lane
13
3
0
30 Nov 2022
OLLA: Optimizing the Lifetime and Location of Arrays to Reduce the Memory Usage of Neural Networks
Benoit Steiner
Mostafa Elhoushi
Jacob Kahn
James Hegarty
29
8
0
24 Oct 2022
Demand Layering for Real-Time DNN Inference with Minimized Memory Usage
Min-Zhi Ji
Saehanseul Yi
Chang-Mo Koo
Sol Ahn
Dongjoo Seo
N. Dutt
Jong-Chan Kim
42
16
0
08 Oct 2022
Design Automation for Fast, Lightweight, and Effective Deep Learning Models: A Survey
Dalin Zhang
Kaixuan Chen
Yan Zhao
B. Yang
Li-Ping Yao
Christian S. Jensen
43
3
0
22 Aug 2022
MCUNetV2: Memory-Efficient Patch-based Inference for Tiny Deep Learning
Ji Lin
Wei-Ming Chen
Han Cai
Chuang Gan
Song Han
37
154
0
28 Oct 2021
Differentiable Network Pruning for Microcontrollers
Edgar Liberis
Nicholas D. Lane
22
18
0
15 Oct 2021
μ
μ
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NAS: Constrained Neural Architecture Search for Microcontrollers
Edgar Liberis
L. Dudziak
Nicholas D. Lane
BDL
13
103
0
27 Oct 2020
MCUNet: Tiny Deep Learning on IoT Devices
Ji Lin
Wei-Ming Chen
Yujun Lin
J. Cohn
Chuang Gan
Song Han
56
475
0
20 Jul 2020
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