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Acceleration of probabilistic reasoning through custom processor
  architecture

Acceleration of probabilistic reasoning through custom processor architecture

27 February 2021
Nimish Shah
Laura Isabel Galindez Olascoaga
Wannes Meert
Marian Verhelst
    BDL
ArXiv (abs)PDFHTML

Papers citing "Acceleration of probabilistic reasoning through custom processor architecture"

2 / 2 papers shown
Title
DPU: DAG Processing Unit for Irregular Graphs with Precision-Scalable
  Posit Arithmetic in 28nm
DPU: DAG Processing Unit for Irregular Graphs with Precision-Scalable Posit Arithmetic in 28nm
Nimish Shah
Laura Isabel Galindez Olascoaga
Shirui Zhao
Wannes Meert
Marian Verhelst
46
12
0
10 Dec 2021
GRAPHOPT: constrained-optimization-based parallelization of irregular
  graphs
GRAPHOPT: constrained-optimization-based parallelization of irregular graphs
Nimish Shah
Wannes Meert
Marian Verhelst
17
5
0
05 May 2021
1