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2212.03965
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CODEBench: A Neural Architecture and Hardware Accelerator Co-Design Framework
7 December 2022
Shikhar Tuli
Chia-Hao Li
Ritvik Sharma
N. Jha
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Papers citing
"CODEBench: A Neural Architecture and Hardware Accelerator Co-Design Framework"
5 / 5 papers shown
Title
EdgeTran: Co-designing Transformers for Efficient Inference on Mobile Edge Platforms
Shikhar Tuli
N. Jha
19
3
0
24 Mar 2023
Efficient Multi-objective Neural Architecture Search via Lamarckian Evolution
T. Elsken
J. H. Metzen
Frank Hutter
117
498
0
24 Apr 2018
Xception: Deep Learning with Depthwise Separable Convolutions
François Chollet
MDE
BDL
PINN
198
14,190
0
07 Oct 2016
Densely Connected Convolutional Networks
Gao Huang
Zhuang Liu
L. V. D. van der Maaten
Kilian Q. Weinberger
PINN
3DV
244
35,884
0
25 Aug 2016
Dropout as a Bayesian Approximation: Representing Model Uncertainty in Deep Learning
Y. Gal
Zoubin Ghahramani
UQCV
BDL
247
9,042
0
06 Jun 2015
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